The speed at which a processor performs basic operations is known as the “clock rate”. These basic processor operations include, for example, adding two numbers or transferring a value from one register to another register. The clock rate is usually given in Mega-Hertz (millions of cycles per seconds). The clock rate of a processor is normally determined by the frequency of vibration of a quartz crystal that sends pulses (clock signals) to the processor.
In a processor, counters are used to count the sequence of operations that are performed by the processor in accordance with programmed instructions and to call forth the next operation from memory when the preceding instruction has been completed. When processors are accessing (e.g., reading) a shared memory in a multi-processor system, there is a delay between the read request from memory and the actual return of the data to the processor from shared memory. These delays are caused by an uncontrollable event such as, for example, another processor in the system attempting to read the same value in the shared memory or due to the instructions that need to be executed by the processor between the request occurrence and the actual read occurrence.
Multi-processor systems typically compute a processor clock frequency ratio that relates one processor's counter increment rate to another processor's counter increment rate. In a computer system where there is no common frequency clock source, the frequency ratio is calculated based on the difference in magnitude between two counters on different processors over a known interval. Therefore, the calculated frequency ratio can be used to translate one processor's counter value to the other processor's counter value. This translation of independent processor counter values to a common frequency can be used to implement a software based globally accessible common frequency counter within a multi-processor system. However, current methods do not use this frequency ratio to accurately compute a value of a counter in a processor when latencies occur in a multi-processor system.
Therefore, the current technology is limited in its capabilities and suffers from at least the above constraints and deficiencies.